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David Kehlet (david.kehlet@intel.com) received his B.S. and M.S. degrees in electrical engineering from Stanford University. He is a researcher at Intel, San Jose, California, 95134, USA, working on pathfinding for field programmable gate arrays technology. He is currently developing chiplets and interfaces to enable a new model of electronic system development. Earlier at Intel, he was vice president of IP Engineering, developing communications protocols, signal processing, and memory interfaces on Intel’s programmable logic devices. Recently, he represented Intel regarding chiplet technologies to the U.S. government, to industry, and to Intel customers and partners. He holds 18 patents in the areas of computer graphics and video.
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Jackson Fugate,Greg Stitt,Naren Vikram Raj Masna,Aritra Dasgupta,Swarup Bhunia, Nij Dorairaj,David Kehlet
2023 IEEE 41st VLSI Test Symposium (VTS)pp.1-7, (2023)
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