Scheduling Garbage Collection for Energy Efficiency on Asymmetric Multicore Processors
CoRR(2024)
摘要
The growing concern for energy efficiency in the Information and
Communication Technology (ICT) sector has prompted the exploration of resource
management techniques. While hardware architectures, such as single-ISA
asymmetric multicore processors (AMP), offer potential energy savings, there is
still untapped potential for software optimizations. This paper aims to bridge
this gap by investigating the scheduling of garbage collection (GC) activities
on a heterogeneous architecture with both performance cores ("p-cores") and
energy cores ("e-cores") to achieve energy savings.
Our study focuses on the concurrent ZGC collector in the context of Java
Virtual Machines (JVM), as the energy aspect is not well studied in the context
of latency-sensitive Java workloads. By comparing the energy efficiency,
performance, latency, and memory utilization of executing GC on p-cores versus
e-cores, we present compelling findings.
We demonstrate that scheduling GC work on e-cores overall leads to
approximately 3
degradation while requiring no additional effort from developers. Overall
energy reduction can increase to 5.3±0.0225
e-cores (still not changing the program!).
Our findings highlight the practicality and benefits of scheduling GC on
e-cores, showcasing the potential for energy savings in heterogeneous
architectures running Java workloads while meeting critical latency
requirements. Our research contributes to the ongoing efforts toward achieving
a more sustainable and efficient ICT sector.
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