Effect and Resolution of Parasitic Inductance of on Current Sharing for Parallel SiC MOSFETs

SiC MOSFETs are gaining in popularity due to their excellent performance. In the applications of high voltage and high current power converters, a multi-chip parallel method can increase current level to meet the load demand but suffers from a potentially current imbalance between different chips. In this paper, the influence of peripheral parameters on parallel flow sharing effect is studied extensively. Where an imbalance occurs between parallel SiC MOSFETs, the proposed method introduces a differential mode choke to suppress the unbalanced current. The physical concepts, working principles and design criteria of the differential mode choke suppression method are described in detail. Simulation tests are carried out to verify the effectiveness of the technique.