Method and modem chip using customizable ramp-up and ramp-down amplitude profiles for a digital power amplifier (DPA) based transmitter

Apparatuses, systems, and methods for a digital power amplifier (DPA) to generate a monotonic and linear ramp-up and ramp-down for a time division multiple access (TDMA) slot transmission are described. In one aspect, a monotonic and linear amplitude-to-control input code relationship model is generated for the DPA and stored. When the DPA needs to generate a ramp-up or ramp-down, the stored monotonic and linear amplitude-to-control input code relationship model is used to shape the input control code before it is input into the DPA. A new monotonic and linear amplitude-to-control input code relationship model may be generated and stored if the operating conditions change. The apparatuses, systems, and methods described herein may be applied to a multi-standard broadband modem chip capable of 2G transmission.