4.4 A 1.3TOPS/W @ 32GOPS Fully Integrated 10-Core SoC for IoT End-Nodes with 1.7μW Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode

2021 IEEE International Solid- State Circuits Conference (ISSCC)(2021)

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摘要
The Internet-of-Things requires end-nodes with ultra-low-power always-on capability for long battery lifetime, as well as high performance, energy efficiency, and extreme flexibility to deal with complex and fast-evolving near-sensor analytics algorithms (NSAAs). We present Vega, an always-on IoT end-node SoC capable of scaling from a 1.7$\mu$ W fully retentive COGNITIVE sleep mode up to 32.2GOPS (@49.4mW) peak performance on NSAAs, including mobile DNN inference, exploiting 1.6MB of state- retentive SRAM, and 4MB of non-volatile MRAM. To meet the performance and flexibility requirements of NSAAs, the SoC features 10 RISC-V cores: one core for SoC and IO management and a 9-core cluster supporting multi-precision SIMD integer and floating- point computation. Two programmable machine-learning (ML) accelerators boost energy efficiency in sleep and active state, respectively.
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关键词
MRAM-based state-retentive sleep mode,Internet-of-Things,long battery lifetime,energy efficiency,fast-evolving near-sensor analytics algorithms,NSAAs,mobile DNN inference,nonvolatile MRAM,9-core cluster,active state,RISC-V,fully retentive COGNITIVE sleep mode,IoT end-node SoC,cognitive wake-up,fully integrated 10-core SoC,state-retentive SRAM,IO management,multiprecision SIMD integer-point computation,floating-point computation,programmable machine-learning accelerators,ultra-low-power always-on capability,Vega,power 1.7 muW,power 49.4 mW,storage capacity 1.6 Mbit,storage capacity 4.0 Mbit,IO
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