Towards Automatic High-Level Code Deployment On Reconfigurable Platforms: A Survey Of High-Level Synthesis Tools And Toolchains

IEEE ACCESS(2020)

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摘要
Heterogeneous computing systems with tightly coupled processors and reconfigurable logic blocks provide great scope to improve software performance by executing each section of code on the processor or custom hardware accelerator that best matches its requirements and the system optimisation goals. This article is motivated by the idea of a software tool that can automatically accomplish the task of deploying code, originally written for a conventional computer, to the processors and reconfigurable logic blocks in a heterogeneous system. We undertake an extensive survey of high-level synthesis tools to determine how close we are to this vision, and to identify any capability gaps. The survey is structured according to a new framework that clearly expresses the relationships between the many tools surveyed. We find that none of the existing tools can deploy general high-level code without manual intervention. Logic synthesis from arbitrary high-level code remains an open problem with dynamic data structures, function pointers and recursion all presenting challenges. Other challenges include automating the tasks of code partitioning, optimisation and design space exploration.
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关键词
Tools,Field programmable gate arrays,Hardware design languages,Hardware,Task analysis,Manuals,Program processors,Automatic code deployment,field programmable gate arrays,high level synthesis,heterogeneous platforms
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