NFV acceleration: the role of the NIC

SFMA'18(2018)

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摘要
Network function virtualization (NFV) technology strives to consolidate network services on common infrastructure and reduce costs [14]. To meet the high performance demands of modern networks NFV solutions must rely on hardware acceleration [4, 5, 18], both for accelerating hypervisor-level virtual switching and for computationally intensive tasks at the VNF-level. Modern NICs accelerate network protocol processing and cryptographic operations, and provide certain programmability for virtual network function (VNF) designers. However, NICs are not flexible enough for implementing offloads necessary to support rapidly evolving network standards and new cryptographic protocols and ciphers. General purpose programmable devices such as FPGAs or many-core network processors are required, as the time to develop a new ASIC for such changes is too long [28]. In this work we focus on FPGA accelerators, as they combine the needed flexibility with high throughput and low and predictable latency [12]. We claim, however, that there are numerous challenges that VNF developers have to overcome in order to be able to leverage FPGAs for network acceleration, which are common among different VNF implementations. To understand why, we consider the example of an IPSec gateway, and outline its operation as a Virtual Network Function.The gateway encrypts and decrypts packets between public and private networks. As these networks are virtualized by the datacenter infrastructure, the VNF packets are typically tunnelled over the data center physical network using an overlay networking protocol such as VXLAN [19], before being …
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