Testability Measures Considering Circuit Reconvergence to Reduce ATPG Runtime

2019 IEEE 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)(2019)

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摘要
Reconvergence has been recognized as the main reason for ATPG backtrack. It induces not only more, but also prolonged backtracks and causes more severe performance degradation than expected. In this paper, we propose a reconvergence-aware testability measure to better guide the ATPG justification process. Experiment results show that the proposed method significantly decreases the ATPG runtime, especially for circuits with deep logic level, by up to 76%.
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关键词
Logic gates,Runtime,Circuit faults,Controllability,Correlation,Central Processing Unit,Probabilistic logic
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