High-performance and high-speed implementation of polynomial basis Itoh-Tsujii inversion algorithm over GF(2 m ).

IET Information Security(2017)

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摘要
In this study high-performance and high-speed field-programmable gate array (FPGA) implementations of polynomial basis Itoh-Tsujii inversion algorithm (ITA) over GF(2m) constructed by irreducible trinomials and pentanomials are presented. The proposed structures are designed by one field multiplier and k-times squarer blocks or exponentiation by 2k, where k is a small positive integer. The k-times...
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关键词
field programmable gate arrays,flip-flops,logic design,multiplying circuits,polynomials,trees (mathematics)
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