A New Sigma–Delta Modulator Architecture for Testing Using Digital Stimulus

Sigma-delta modulators are commonly used in high-resolution ADCs. Testing this type of modulator requires a high-resolution test stimulus, which is di fficult to generate. A new architecture for the modulator is prop osed so that its performance can be determined using only digi tal test stimulus. This architecture does not need analo g test stimuli, which is prone to distortion/noise while s etting up the high-resolution modulator for testing. Simulation results show that this technique is capable of accurate ly determining the performance of a second-order sigma-delta modulator ADC.