USIMM: the Utah SImulated Memory Module A Simulation Infrastructure for the JWAC Memory Scheduling Championship

USIMM, the Utah SImulated Memory Module, is a DRAM main memor y system simulator that is being released for use in the Memory Scheduling Champ ionship (MSC), organized in conjunction with ISCA-39. MSC is part of the JILP Workshop s on Computer Architecture Competitions (JWAC). This report describes the simula tion infrastructure and how it will be used within the competition.