A self-duty-cycled and synchronized UWB receiver SoC consuming 375pJ/b for −76.5dBm sensitivity at 2Mb/s

Solid-State Circuits Conference Digest of Technical Papers(2013)

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摘要
Novel highly networked applications with severe energy constraints such as tag and body-area networks, for ubiquitous object networking or the `Internet of Things' are driving the need for ultra-low-power wireless data links that operate over a short range and with a relatively low data rate. Impulse radio UWB (IR-UWB) has shown unique promise for these applications; however, the synchronization and bit-level duty cycling of the receiver have remained a significant challenge. In this work, we present a fully bit-level-duty-cycled IR-UWB receiver SoC with a clock-and-data-recovery(CDR)-based synchronization for demodulation and self-duty cycling. The SoC contains the full receiver from RF signal in to clocked digital data bits out.
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关键词
clock and data recovery circuits,demodulation,radio receivers,system-on-chip,ultra wideband communication,cdr,internet of things,rf signal,bit-level duty cycling,bit-level-duty-cycled ir-uwb receiver soc,body-area network,clock-and-data-recovery-based synchronization,energy constraint,impulse radio uwb,networked application,self-duty cycling,self-duty-cycled uwb receiver soc,synchronized uwb receiver soc,tag,ubiquitous object networking,ultra-low-power wireless data link,system on chip
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