Umts Mpsoc Design Evaluation Using A System Level Design Framework
Design, Automation, and Test in Europe(2009)
摘要
Rapid design space exploration with accurate models is necessary to improve designer productivity at the electronic system level. We describe how to use a new event-based design framework, Metro II, to carry out simulation and design space exploration of multi-core architectures. We illustrate the design methodology on a UMTS data link layer design case study with both a timed and untimed functional model as well as a complete set of MPSoC architectural services. We compare different architectures (including RTOSes) explored with Metro II and quantify the associated simulation overhead.
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关键词
3G mobile communication,integrated circuit design,system-on-chip,MPSoC,UMTS,data link layer design,design evaluation,designer productivity,electronic system level,space exploration,system level design,
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