A 140ma 90nm Cmos Low Drop-Out Regulator With-56db Power Supply Rejection At 10mhz
IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE 2010（2010）
摘要
A high power supply rejection (PSR) low drop-out (LDO) voltage regulator employing a simple supply ripple cancellation adaptive technique is presented in this paper. The LDO is implemented in 90nm digital CMOS process and occupies an active area of 0.015mm(2). The measured PSR is better than 50dB up to 10MHz across the load current range of 140mA with a drop-out voltage of 0.15V. The quiescent current (I-Q) varies adaptively from 33 mu A at no load to 145 mu A at maximum load with a current efficiency of 99.9%. Load regulation of 6mV for a 140mA step in load current is measured.
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关键词
CMOS integrated circuits,power supply circuits,voltage regulators,current 140 mA,digital CMOS process,frequency 10 MHz,high power supply rejection,load current,load regulation,low drop-out voltage regulator,quiescent current,size 90 nm,supply ripple cancellation adaptive technique,voltage 0.15 V,
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